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模擬設(shè)計(jì)工程師崗位職責(zé)(2篇范文)

發(fā)布時(shí)間:2023-10-09 09:45:03 查看人數(shù):63

模擬設(shè)計(jì)工程師崗位職責(zé)

第1篇 模擬設(shè)計(jì)工程師崗位職責(zé)

模擬設(shè)計(jì)工程師 job descriptions:

1. will work on the following analog ips but not limit to: adc/dac, ldo/dcdc, por, bor, band-gap, various amplifiers, pll/dll and high speed interface design

2. be responsible for schematic capture, simulation, test plan, dk generation and bench verification/characterizations.

3. escort and instruct layout designers to complete physical implementations

4. ensure database integrity before any release.

5. execute any project assignment in the timing manner.

6. follow company’s quality standards during any project execution.

job requirements:

1. at least 3 or more years of analog circuit design experience with ms in ee or physics (more senior levels will also be considered)

2. willing to work as an active team player with group’s goal in mind.

3. familiar with spice simulations including monte-carlo analysis

4. strong knowledge in physical layout and component’s parasitic effects.

5. knowledge with process and device physics is a plus

6. acceptable communication skill in written and spoken english

7. experience in sigma-delta adc/dac, is a plus. job descriptions:

1. will work on the following analog ips but not limit to: adc/dac, ldo/dcdc, por, bor, band-gap, various amplifiers, pll/dll and high speed interface design

2. be responsible for schematic capture, simulation, test plan, dk generation and bench verification/characterizations.

3. escort and instruct layout designers to complete physical implementations

4. ensure database integrity before any release.

5. execute any project assignment in the timing manner.

6. follow company’s quality standards during any project execution.

job requirements:

1. at least 3 or more years of analog circuit design experience with ms in ee or physics (more senior levels will also be considered)

2. willing to work as an active team player with group’s goal in mind.

3. familiar with spice simulations including monte-carlo analysis

4. strong knowledge in physical layout and component’s parasitic effects.

5. knowledge with process and device physics is a plus

6. acceptable communication skill in written and spoken english

7. experience in sigma-delta adc/dac, is a plus.

第2篇 ic模擬設(shè)計(jì)工程師崗位職責(zé)

職位描述:

設(shè)計(jì)高速模擬/混合信號(hào)ic,完成仿真和驗(yàn)證,撰寫(xiě)設(shè)計(jì)文檔;

崗位要求

1、微電子或電子相關(guān)專(zhuān)業(yè),碩士及以上學(xué)歷;

2、設(shè)計(jì)過(guò)adc/dac,serdes,cdr,pll中的一種或多種;

3、能熟練使用eda軟件進(jìn)行電路、版圖設(shè)計(jì)和仿真;

4、具有扎實(shí)的信號(hào)和系統(tǒng)基礎(chǔ)。

工作區(qū)域:

蘇州、新加坡

模擬設(shè)計(jì)工程師崗位職責(zé)(2篇范文)

模擬設(shè)計(jì)工程師 job descriptions:1. will work on the following analog ips but not limit to: adc/dac, ldo/dcdc, por, bor, band-gap, various amplifiers, pll/dll an…
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